As per name data transfer instructions in 8085 microprocessor used for the data transfer operation. Let’s have a quick look over classification of instructions.
8085 Instruction Set Classification
The 8085 instruction set can be classified into the following five functional headings.
Data transfer instructions
It includes the instructions that move (copies) data between registers or between memory locations and registers.
In all data transfer operations, the content of source register is not altered. Hence the data transfer is copying operation.
Example: (1) MOV A,B (2) MVI C,45H
Arithmetic instructions
Includes the instructions, which performs the addition, subtraction, increment or decrement operations.
The flag conditions are altered after execution of an instruction in this group.
Example: (1) ADD A,B (2) SUI B,05H
Logical instructions
The instructions which perform the logical operations like AND, OR, EXCLUSIVE- OR, complement, compare and rotate instructions are grouped under this heading.
The flag conditions are altered after execution of an instruction in this group.
Example: (1) ORA A (2) ANI B, 01H
Branching instructions
The instructions that are used to transfer the program control from one memory location to another memory location are grouped under this heading.
Example: (1) CALL (2) JMP 4100
Machine Control Instructions
It includes the instructions related to interrupts and the instruction used to stop the program execution.
Example: (1) NOP (2) END
Data Transfer Instructions in 8085
Opcode | Operand | Explanation of Instruction | Description |
MOV | Rd, Rs M, Rs Rd, M | Copy from source(Rs) to destination(Rd) | This instruction copies the contents of the source register into the destination register; the contents of the source register are not altered. If one of the operands is a memory location, its location is specified by the contents of the HL registers. Example: MOV B, C or MOV B, M |
MVI | Rd, data M, data | Move immediate 8-bit | The 8-bit data is stored in the destination register or memory. If the operand is a memory location, its location is specified by the contents of the HL registers. Example: MVI B, 57H or MVI M, 57H |
LDA | 16-bit address | Load accumulator | The contents of a memory location, specified by a 16-bit address in the operand, are copied to the accumulator. The contents of the source are not altered. Example: LDA 2034H |
LDAX | B/D Reg. pair | Load accumulator indirect | The contents of the designated register pair point to a memory location. This instruction copies the contents of that memory location into the accumulator. The contents of either the register pair or the memory location are not altered. Example: LDAX B |
LXI | Reg. pair, 16-bit data | Load register pair immediate | The instruction loads 16-bit data in the register pair designated in the operand. Example: LXI H, 2034H |
LHLD | 16-bit address | Load H and L registers direct | The instruction copies the contents of the memory location pointed out by the 16-bit address into register L and copies the contents of the next memory location into register H. The contents of source memory locations are not altered. Example: LHLD 2040H |
STA | 16-bit address | 16-bit address | The contents of the accumulator are copied into the memory location specified by the operand. This is a 3-byte instruction, the second byte specifies the low-order address and the third byte specifies the high-order address. Example: STA 4350H |
STAX | Reg. pair | Store accumulator indirect | The contents of the accumulator are copied into the memory location specified by the contents of the operand (register pair). The contents of the accumulator are not altered. Example: STAX B |
SHLD | 16-bit address | Store H and L registers direct | The contents of register L are stored into the memory location specified by the 16-bit address in the operand and the contents of H register are stored into the next memory location by incrementing the operand. The contents of registers HL are not altered. This is a 3-byte instruction, the second byte specifies the low-order address and the third byte specifies the high-order address. Example: SHLD 2470H |
XCHG | none | Exchange H and L with D and E | The contents of register H are exchanged with the contents of register D, and the contents of register L are exchanged with the contents of register E. Example: XCHG |
SPHL | none | Copy H and L registers to the stack pointer | The instruction loads the contents of the H and L registers into Example: SPHL |
XTHL | none | Exchange H and L with top of stack | The contents of the L register are exchanged with the stack location pointed out by the contents of the stack pointer register. The contents of the H register are exchanged with the next stack location (SP+1); however, the contents of the stack pointer register are not altered. Example: XTHL |
PUSH | Reg. pair | Push register pair onto stack | The contents of the register pair designated in the operand are copied onto the stack in the following sequence. The stack pointer register is decremented and the contents of the highorder register (B, D, H, A) are copied into that location. The stack pointer register is decremented again and the contents of the low-order register (C, E, L, flags) are copied to that location. Example: PUSH B or PUSH A |
POP | Reg. pair | Pop off stack to register pair | The contents of the memory location pointed out by the stack pointer register are copied to the low-order register (C, E, L, status flags) of the operand. The stack pointer is incremented by 1 and the contents of that memory location are copied to the high-order register (B, D, H, A) of the operand. The stack pointer register is again incremented by 1. Example: POP H or POP A |
OUT | 8-bit port address | Output data from accumulator to a port with 8-bit address | The contents of the accumulator are copied into the I/O port specified by the operand. Example: OUT F8H |
IN | 8-bit port address | Input data to accumulator from a port with 8-bit address | The contents of the input port designated in the operand are read and loaded into the accumulator. Example: IN 8CH |