FPGA – Field Programmable Gate Array

  • FPGA (Field Programmable Gate Array) is a fine grain device with small logic blocks and has medium to very high density suitable for large complex densities.
  • In FPGA, delays are dependent on applications. It uses SRAM or Antifuse technology. It has more density and it is more volatile.

Features of FPGA

  1. It has high complexity, density and reliability.
  2. Ideal for customized design.
  3. Offers the advantages of high integration.
  4. It has low cost, power consumption and small physical size.
  5. It has cascade chain for wide input functions.
  6. Avoid the problems of ASICs.
  7. Dedicated carry logic for high-speed arithmetic functions.

General Architecture of FPGA

The general architecture of an FPGA is as shown in figure. But each vendor has its own architecture.

fpga structure, block diagram of fpga,
Figure 1: General structure of FPGA
  • The architecture of an FPGA consists of configurable logic blocks, configurable input-output blocks and programmable interconnects. They are discussed below.
  • Also, there will be clock circuitry for driving the additional logic resources.

Configurable Logic Block (CLB)

  • There are a number of configurable logic blocks (CLBs) in an FPGA organized as an array of rows and columns. The logic blocks are connected to the I/O blocks through common row/column programmable interconnects.
  • The common row/column interconnects are known as global interconnects. A logic block consists of a number of logic modules (LMs). The logic modules are the basic logic elements in an FPGA.
  • The logic modules within a CLB are connected through local programmable interconnects. Figure 2 shows a general structure for basic CLB.
Basic configurable logic block of FPGA
Figure 2: Basic configurable logic block
  • Configurable Logic Blocks (CLBs) contain the logic for FPGA. In the large grain architecture, these CLBs will contain logic to create a small state machine.
  • The logic diagram for FPGA CLB is shown in the figure 3 and it would be considered as a large grain block.
Block diagram of FPGA CLB
Figure 3: FPGA Configurable Logic Block (CLB)
  • It consists of RAM for creating large arbitrary configurable logic functions. It also contains flip-flops for clocked storage elements and multiplexers in order to route logic within the block and from external resources.
  • The multiplexers also allow polarity selection and reset and clear input relation.

Configurable IO Block

The logic diagram of a configurable IO block as shown in figure 4.

I/O block in FPGA,
Figure 4: Configurable IO block
  • It consists of an input buffer and an output buffer with three states, and open collector output controls.
  • Typically, there are pull-up resistors on the outputs and sometimes pull-down resistors.
  • The polarity of the output can usually be programmed for fast or slow rise and fall times.
  • In addition, there is often a flip-flop on outputs so that clocked signals can be output directly to the pins without encountering significant delay.
  • It is done for input so that there is no much delay on a signal before reaching a flip-flop which would increase the device hold time requirement.
  • A configuration IO is used to bring the signals into the chip and send them back Off again.

Programmable Interconnect

A block diagram of an FPGA programmable interconnect is shown in Figure 5.

FPGA - Field Programmable Gate Array
Figure 5: General structure of interconnect
  • The interconnect of a FPGA is very different than that of a CPLD, but is rather similar to that of a gate array ASIC.
  • The number on each arrow indicates the number of wires in that signal path. A CLB has two outputs. Each output is going to the CLB below and right of it.
  • Four wires of the group known as “Global clock” which are used as clock inputs to CLBs.
  • The two ‘single’ groups are used for flexible connectivity between adjacent blocks. Wires in the ‘two’ groups travel through two CLBs before hitting a switch, and they provide shorter delays for longer connection.


The types of FPGA are as under

  1. SRAM-based
  2. Antlfuse-based


The SRAM based FPGA families include the following

  1. Xilinx XC4000, XC5200, Virtex and Spartan
  2. Altera FLEX
  3. Atmel AT 6000 and AT 40 K
  4. Lucent ttechnologies OECA

Antifuse-based FPGA families include the following

  1. Actel PRCASIC PLUS families, SX and MX
  2. Quick logic PASIC

Applications of CPLDs and FPGAs

  • CPLDs and FPGAs are used today in many diverse applications, such as consumer products like DVD players and high-end television sets, controller circuits for automobile factories and test equipment.
  • They are also used in Internet routers and high-speed network switches, and computer equipment like large tape and disk storage systems.
  • In a given design situation a CPLD may be chosen when the needed circuit is not very large, or when the device has to perform its function immediately upon application of power to the circuit.
  • FPGAs are not a good choice for this latter case because, they are configured by volatile storage elements that lose their stored contents when the power is turned off. This property results in a delay before the FPGA chip can perform its function when turned on.
  • FPGAs are suitable for implementation of circuits over a large range of size, from about 1000 to more than a million equivalent logic gates. In addition to size a designer will consider other criteria, such as the needed speed of operation of a circuit, power dissipation constraints, and the cost of the chips.

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